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214223 - kria-kv260 hls4ml

Summary: Test failed.

Model Details

  • model name : DeepAutoEncoder.onnx

Logs Details

user.log
=== Updating submodules ===
=== Checking Vitis installation ===
=== Setting up artifacts directory ===
=== Setting up build environment ===
=== Setting up configuration file ===
=== Backing up existing config file ===
=== Generating unique hash for model file: DeepAutoEncoder.onnx ===
=== Creating project directory for model: DeepAutoEncoder.onnx with hash: 88afbd53 ===
=== Copying model file to project directory ===
=== Model file copied to: /opt/nomad/alloc/build/88afbd53/model/DeepAutoEncoder.onnx ===
=== Creating necessary subdirectories for build process ===
=== Creating stages directory for build stages ===
=== Creating hls4ml directory for HLS project ===
=== No existing .config file found in model directory. Proceeding with default configuration ===
=== Creating config file for build process ===
=== Configuration file created at: /opt/nomad/alloc/build/.config ===
=== Configuration details: ===
# This file is automatically generated by support.sh

PROJECT_DIRNAME="/opt/nomad/alloc/build/88afbd53"
MODEL_NAME="DeepAutoEncoder.onnx"
MODEL="/opt/nomad/alloc/build/88afbd53/model/DeepAutoEncoder.onnx"
HLS4ML_DIR="/opt/nomad/alloc/build/88afbd53/hls4ml"
STAGES_DIR="/opt/nomad/alloc/build/88afbd53/.stages"
MODEL_HASH="88afbd53"
BENCHMARK_TYPE="TYPE1"
REUSE_FACTOR="128"
=== Build environment setup complete ===
=== Starting build script ===
=== Generating HLS project for model: /opt/nomad/alloc/build/88afbd53/model/DeepAutoEncoder.onnx in project directory: /opt/nomad/alloc/build/88afbd53 ===
=== Build logs will be saved to: /opt/nomad/alloc/build/88afbd53/hls4ml/build.log ===
error.log
Error: Build process failed with exit code 1
IP generation failed: HLS build/synthesis failed for DeepAutoEncoder.
Error: Build failed for ip_hls_ios. See logs for details.

Build configuration:
  - CSIM: False
  - Synthesis: True
  - Export: True
  - Output directory: hls_prj

Suggestions:
  1. Check the build logs in hls_prj
  2. Verify Vitis HLS environment is properly configured
  3. Ensure the target part xck26-sfvc784-2LV-C is valid
  4. Try running with CSIM first to validate the design

See full traceback above.

Relevant errors from build.log:
ERROR: [HLS 214-256] in function 'ip_hls_ios(hls::stream<nnet::array<ap_fixed<16, 6, (ap_q_mode)5, (ap_o_mode)3, 0>, 640u>, 0>&, hls::stream<nnet::array<ap_fixed<16, 6, (ap_q_mode)5, (ap_o_mode)3, 0>, 640u>, 0>&)': Unsupported aggregate pragma/directive on variable 'layer70_out' as the bit-width after aggregation (10240) is larger than 4096 (firmware/ip_hls_ios.cpp:150:25)
ERROR: [HLS 200-1715] Encountered problem during source synthesis

Report Details

report.json
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